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Kyösti Mälkki c0ad649f34 UPSTREAM: CBMEM: Add config CBMEM_TOP_BACKUP 
AGESA and binaryPI boards have no easy way to determine correct
cbmem_top() location early enough when GFXUMA is enabled, so they
will use these functions with EARLY_CBMEM_INIT as well.

At the end of AmdInitPost() the decisions of UMA base and size
have not been written to hardware yet. The decisions are stored
inside AGESA heap object we cannot locate from coreboot proper
until after AmdInitEnv().

Modify code such that weak backup functions are only defined
for LATE_CBMEM_INIT; they are somewhat troublesome to handle.

BUG=none
BRANCH=none
TEST=none

Change-Id: I507ef40b77f20c76b3178654c397a4130092240d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: a7dd645594
Original-Change-Id: Ifef4f75b36bc6dee6cd56d1d9164281d9b2a4f2a
Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/19306
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-on: https://chromium-review.googlesource.com/508776
Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
2017-05-18 18:07:12 -07:00
..
arm UPSTREAM: Remove libverstage as separate library and source file class 2017-03-29 13:43:09 -07:00
arm64 UPSTREAM: arch/arm64: Use variables of the right size for msr/mrs opcodes 2017-05-16 10:41:45 -07:00
mips
power8
riscv UPSTREAM: riscv: Suppress invalid coverity errors 2017-02-21 06:44:26 -08:00
x86 UPSTREAM: CBMEM: Add config CBMEM_TOP_BACKUP 2017-05-18 18:07:12 -07:00