coreboot/src
Kyösti Mälkki c7c02673e4 RELOCATABLE_RAMSTAGE: Fix weak symbols with ramstage_cache
We had NULL reference with cache_loaded_ramstage() if
CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM was not set so boot never
proceeded to ramstage.

Cache implementation outside CBMEM provides means for platform-specific
location so there is no need of weak attributes here.

Change-Id: I1eb1a713896395c424fde23252c374f9065fe74d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7954
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-28 19:56:58 +01:00
..
arch cpu/armltd/cortex-a9: Remove stub func dead code 2014-12-19 22:32:13 +01:00
console ipq8064: prepare UART driver for use in coreboot 2014-12-05 20:22:47 +01:00
cpu AGESA fam15: Unify agesawrapper 2014-12-20 07:24:41 +01:00
device spd_cache debug: Log invalid CRC checksum 2014-12-19 19:26:15 +01:00
drivers TPM: Fix i2c driver dependency 2014-12-23 04:13:32 +01:00
ec i2c: Replace the i2c API. 2014-12-16 00:02:43 +01:00
include RELOCATABLE_RAMSTAGE: Fix weak symbols with ramstage_cache 2014-12-28 19:56:58 +01:00
lib RELOCATABLE_RAMSTAGE: Fix weak symbols with ramstage_cache 2014-12-28 19:56:58 +01:00
mainboard blaze: change ramcode 0001/0010 to use 792MHz bct 2014-12-26 19:45:52 +01:00
northbridge AGESA: Use common agesawrapper 2014-12-20 07:28:12 +01:00
soc samsung/exynos*/Makefile.inc: Simplify unnecessary ifeq 2014-12-27 06:31:45 +01:00
southbridge AGESA: Add amd_initcpuio() and amd_initmmio() 2014-12-20 07:18:00 +01:00
superio Drop Intel E7520 and E7525 and related boards 2014-12-18 02:11:06 +01:00
vendorcode amd/agesa/f15/Proc/Common/S3SaveState.c: Sync with f15tn 2014-12-22 11:11:17 +01:00
Kconfig Kconfig: Remove ACPI_SSDTX_NUM. 2014-12-07 21:06:34 +01:00