Many peripheral drivers across different SoCs regularly face the same task of piping a transfer buffer into (or reading it out of) a 32-bit FIFO register. Sometimes it's just one register, sometimes a whole array of registers. Sometimes you actually transfer 4 bytes per register read/write, sometimes only 2 (or even 1). Sometimes writes need to be prefixed with one or two command bytes which makes the actual payload buffer "misaligned" in relation to the FIFO and requires a bunch of tricky bit packing logic to get right. Most of the times transfer lengths are not guaranteed to be divisible by 4, which also requires a bunch of logic to treat the potential unaligned end of the transfer correctly. We have a dozen different implementations of this same pattern across coreboot. This patch introduces a new family of helper functions that aims to solve all these use cases once and for all (*fingers crossed*). Change-Id: Ia71f66c1cee530afa4c77c46a838b4de646ffcfb Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34850 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> |
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| .. | ||
| arm/arch | ||
| arm64/arch | ||
| arpa | ||
| mips/arch | ||
| pci | ||
| storage | ||
| sys | ||
| udc | ||
| usb | ||
| x86/arch | ||
| archive.h | ||
| assert.h | ||
| cbfs.h | ||
| cbfs_core.h | ||
| cbfs_ram.h | ||
| cbgfx.h | ||
| compiler.h | ||
| coreboot_tables.h | ||
| ctype.h | ||
| die.h | ||
| endian.h | ||
| errno.h | ||
| exception.h | ||
| fmap_serialized.h | ||
| gdb.h | ||
| getopt.h | ||
| inttypes.h | ||
| ipchksum.h | ||
| kconfig.h | ||
| keycodes.h | ||
| libpayload.h | ||
| limits.h | ||
| lz4.h | ||
| lzma.h | ||
| malloc.h | ||
| multiboot_tables.h | ||
| panel.h | ||
| pci.h | ||
| queue.h | ||
| stdarg.h | ||
| stddef.h | ||
| stdint.h | ||
| stdio.h | ||
| stdlib.h | ||
| string.h | ||
| strings.h | ||
| swab.h | ||
| sysinfo.h | ||
| term.h | ||
| time.h | ||
| unistd.h | ||
| video_console.h | ||