coreboot/src/cpu
Gabe Black c581a18416 exynos5420: Fix the clock divisor mask.
The divisor mask had been set to 0xff, but the bitfield is 4 bits wide.

BUG=chrome-os-partner:19420
TEST=Built and booted into RW on pit. A hang still prevents booting, but the
EC RW was updated successfully.
BRANCH=None

Change-Id: Id8a205c80ca2fb0b6f0d86a0c3be4bba9527c0b5
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/63188
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
2013-07-25 10:27:31 -07:00
..
amd copy_and_run: drop boot_complete parameter 2013-05-10 11:55:19 -07:00
armltd qemu-armv7 CPU: Move Kconfig code into CPU directory 2013-06-20 15:51:33 -07:00
intel haswell: Update microcode revision 2013-07-23 11:14:18 -07:00
samsung exynos5420: Fix the clock divisor mask. 2013-07-25 10:27:31 -07:00
via copy_and_run: drop boot_complete parameter 2013-05-10 11:55:19 -07:00
x86 BACKPORT: x86: add cache-as-ram migration option 2013-05-16 15:06:24 -07:00
Kconfig Simplify early / bootblock console code 2013-06-20 13:54:33 -07:00
Makefile.inc cpu: Add CPU microcode file to cbfs with 16-byte alignment 2013-06-12 06:55:42 -07:00