coreboot/src
Florian Zumbiehl c4442b09fe fix DDR_MASK in load-dependent clock limiting for socket 939 in k8 raminit
Change-Id: Ibdce9712f5019863b1cd61b68da11d7c46c6b6f8
Signed-off-by: Florian Zumbiehl <florz@florz.de>
2011-11-03 06:36:44 +01:00
..
arch/x86 remove trailing whitespace 2011-11-01 19:07:45 +01:00
boot Use ntohll where appropriate. 2011-10-21 14:14:32 +02:00
console remove trailing whitespace 2011-11-01 19:07:45 +01:00
cpu remove trailing whitespace 2011-11-01 19:07:45 +01:00
devices remove trailing whitespace 2011-11-01 19:07:45 +01:00
drivers remove trailing whitespace 2011-11-01 19:07:45 +01:00
ec Lenovo H8: Fix h8_set_audio_mute() 2011-10-25 17:48:41 +02:00
include remove trailing whitespace 2011-11-01 19:07:45 +01:00
lib remove trailing whitespace 2011-11-01 19:07:45 +01:00
mainboard remove trailing whitespace 2011-11-01 19:07:45 +01:00
northbridge fix DDR_MASK in load-dependent clock limiting for socket 939 in k8 raminit 2011-11-03 06:36:44 +01:00
pc80 Fix checksum calculation both in romstage and ramstage. 2011-10-28 09:09:40 +02:00
southbridge compile code for CONFIG_SOUTHBRIDGE_VIA_K8T800_OLD 2011-11-03 06:36:43 +01:00
superio remove trailing whitespace 2011-11-01 19:07:45 +01:00
vendorcode Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6 2011-10-14 22:57:11 +02:00
Kconfig refactor vesa mode setting code and bootsplash code 2011-10-13 20:00:50 +02:00
Kconfig.deprecated_options some ifdef --> if fixes 2011-04-21 20:24:43 +00:00