Aaron Durbin c30981c952 soc/amd/picasso: snapshot chipset state early in boot sequence ... Previously the chipset state was snapshotted very late in the boot (ramstage). Instead start gathering the state early in romstage prior to calling any FSP routines so there's a clean snapshot. BUG=b:159947207 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Id41686e6cdf5bebc9633b514b4121b0447f9be2d Reviewed-on: https://review.coreboot.org/c/coreboot/+/44488 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2020-08-17 17:41:01 +00:00
..
amd	soc/amd/picasso: snapshot chipset state early in boot sequence	2020-08-17 17:41:01 +00:00
cavium	src: Remove unused 'include <types.h>'	2020-07-14 16:10:17 +00:00
intel	soc/intel/skylake/acpi.c: Name devices on secondary bus	2020-08-17 07:12:46 +00:00
mediatek	soc/mediatek/mt8192: Initialize watch dog in bootblock	2020-08-17 04:05:45 +00:00
nvidia	src: Remove unused 'include <stdint.h>	2020-07-14 16:11:10 +00:00
qualcomm	qualcomm/sc7180: Fix TLMM assignments for GPIOs 29, 31 and 32	2020-08-03 05:13:07 +00:00
rockchip	src/soc/rockchip: Add missing <{stddef,stdint}.h>	2020-07-29 09:37:22 +00:00
samsung	src/soc/samsung/exynos{5250,s5420}: Add missing <{stddef,stdint}.h>	2020-07-29 09:34:55 +00:00
sifive	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	2020-06-13 06:49:23 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00