Subrata Banik 0755ab98a5 intel/fsp: Add and use new post codes for FSP phase indication ... New post codes are POST_FSP_MEMORY_EXIT POST_FSP_SILICON_EXIT This patch will make it more consistent to debug FSP hang and reset issues. Bug=none Branch=none TEST=Build and Boot on eve Change-Id: I93004a09c2a3a97ac9458a0f686ab42415af19fb Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/20541 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2017-07-17 15:16:37 +00:00
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fsp1_0	Rename __attribute__((packed)) --> __packed	2017-07-13 19:45:59 +00:00
fsp1_1	intel/fsp1_1: Don't consume FSP_SMBIOS_MEMORY_INFO_HOB in S3 resume path	2017-07-17 15:16:30 +00:00
fsp2_0	intel/fsp: Add and use new post codes for FSP phase indication	2017-07-17 15:16:37 +00:00
gma	drv/intel/gma/i915: Get rid of unused function prototype	2017-07-15 21:53:50 +00:00
i210	intel/i210: Change API for function mainboard_get_mac_address()	2016-07-05 06:27:44 +02:00
mipi_camera	Rename __attribute__((packed)) --> __packed	2017-07-13 19:45:59 +00:00
wifi	Rename __attribute__((packed)) --> __packed	2017-07-13 19:45:59 +00:00