Wim Vervoorn 397ce3c45f vendorcode/eltan/security: Align mboot with coreboot tpm ... Align the eltan mboot support with coreboot tpm support to limit the amount of custom code. We now only support SHA256 pcrs, only single a single digest will be handled in a call. The pcr invalidation has been changed fixed values are now loaded while the correct algortihm is selected. BUG=N/A TEST=tested on fbg1701 Change-Id: Id11389ca90c1e6121293353402a2dd464a2e6727 Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36483 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>		2019-11-05 15:01:37 +00:00
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amd	vc/amd/agesa/f16kb: Cast to UINT64 to avoid overflow	2019-10-22 12:51:36 +00:00
cavium	vendorcode/cavium: Replace use of __PRE_RAM__	2019-09-23 21:39:22 +00:00
eltan	vendorcode/eltan/security: Align mboot with coreboot tpm	2019-11-05 15:01:37 +00:00
google	google/chromeos: Add a library to get DSM calibration data	2019-10-24 15:45:37 +00:00
intel	src/vendorcode/intel: Update Comet Lake FSP headers as per FSP v1394	2019-10-25 02:05:12 +00:00
siemens	vendorcode/siemens: Remove sourcing non existing Kconfig files	2019-10-11 07:08:18 +00:00
Makefile.inc	vendorcode/eltan: Add vendor code for measured and verified boot	2019-06-04 10:41:53 +00:00