Stefan Reinauer c00dfbc1c8 Cache 8MB flash instead of 4MB ... Also fix the MTRR check to use the total_mtrrs variable instead of a hardcoded 8. Change-Id: I2c5ceb3910cd949f43ecf5b8aff857d6ffe0b1a5 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: http://review.coreboot.org/873 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>		2012-04-06 02:13:27 +02:00
..
amd	S3 code whitespaces changes.	2012-04-02 21:11:54 +02:00
intel	Add support for Intel Sandybridge CPU	2012-04-05 21:10:25 +02:00
via	Via Epia-N and C3: Set ioapic delivery type in Kconfig	2012-03-16 20:40:47 +01:00
x86	Cache 8MB flash instead of 4MB	2012-04-06 02:13:27 +02:00
Kconfig	Whitespace fixes	2012-03-31 18:06:09 +02:00
Makefile.inc	qemu: drop "northbridge.c" from src/cpu/...	2010-03-29 21:17:25 +00:00