Felix Held bff9823700 soc/amd/genoa/acpi: include globalnvs.asl in SoC code ... Instead of including globalnvs.asl in the mainboard's dsdt.asl, include it in Genoa's soc.asl. This aligns Genoa with Cezanne and newer and also moves more SoC-common code to the SoC folder. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ie0e3299a95e007188a4d9de824cfff8d25a778be Reviewed-on: https://review.coreboot.org/c/coreboot/+/79465 Reviewed-by: Martin L Roth <gaumless@gmail.com> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2023-12-13 20:30:32 +00:00
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amd	soc/amd/genoa/acpi: include globalnvs.asl in SoC code	2023-12-13 20:30:32 +00:00
cavium	Revert "Kconfig: Bring HEAP_SIZE to a common, large value"	2023-11-07 17:35:39 +00:00
example/min86	soc: Remove SOC_SPECIFIC_OPTIONS	2023-08-21 23:45:43 +00:00
intel	soc/intel/meteorlake: Add entries to eventLog on invocation of early SOL	2023-12-11 05:09:38 +00:00
mediatek	soc/mediatek/mt8188: devapc: Allow APU to access BND_NORTH_APB2_S	2023-12-04 16:48:33 +00:00
nvidia	memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere	2023-10-11 12:08:22 +00:00
qualcomm	qualcomm/sc7180: Move QCSDI and increase romstage size by 4KB	2023-11-18 00:41:53 +00:00
rockchip	fmap: Map less space in fallback path without CBFS verification	2023-11-13 14:19:01 +00:00
samsung	memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere	2023-10-11 12:08:22 +00:00
sifive/fu540	memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere	2023-10-11 12:08:22 +00:00
ti	src/soc/ti: Remove unnecessary space after casts	2022-11-22 13:42:28 +00:00
ucb/riscv	cbmem_top_chipset: Change the return value to uintptr_t	2022-11-18 16:00:45 +00:00