Nico Huber bfb39806c9 nb/intel/haswell: Synchronize lists of graphics PCI IDs ... Both, the list of IDs that we hooked our driver up to and the list that we use for VBIOS mapping, had gaps. Fill those. Change-Id: I97c09bb113cf0f35ae158abbd0ba2632dbad7cad Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82787 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2024-06-06 23:55:24 +00:00
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common	nb/intel/common: Replace _bar_clrsetbits_impl macro	2021-05-03 07:38:52 +00:00
e7505	cpu/x86: Make 1GB paging the default	2024-06-05 20:31:03 +00:00
gm45	cpu/x86: Make 1GB paging the default	2024-06-05 20:31:03 +00:00
haswell	nb/intel/haswell: Synchronize lists of graphics PCI IDs	2024-06-06 23:55:24 +00:00
i440bx	cpu/x86: Make 1GB paging the default	2024-06-05 20:31:03 +00:00
i945	cpu/x86: Make 1GB paging the default	2024-06-05 20:31:03 +00:00
ironlake	cpu/x86: Make 1GB paging the default	2024-06-05 20:31:03 +00:00
pineview	cpu/x86: Make 1GB paging the default	2024-06-05 20:31:03 +00:00
sandybridge	cpu/x86: Make 1GB paging the default	2024-06-05 20:31:03 +00:00
x4x	cpu/x86: Make 1GB paging the default	2024-06-05 20:31:03 +00:00