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coreboot/src/soc
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Jakub Czapiga bfadc78bd7 soc/intel/meteorlake: Add PsysPmax configuration 
psys_pmax_watts is configured in SoC node of devicetree.
Value represents Watts the PSU provides.
Zero means automatic/default configuration (not optimal).

BUG=b:289853442
TEST=Build google/rex/ovis4es target board

Change-Id: I69afa06110254f6384352c062891c0c9c0b23070
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76796
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-10-24 17:59:29 +00:00
..
amd soc/amd/stoneyridge: Update SMU fw2 name in fw.cfg 2023-10-24 16:12:49 +00:00
cavium soc/cavium/cn81xx/bootblock_custom.S: Specify arch 2023-10-20 14:30:54 +00:00
example/min86 soc: Remove SOC_SPECIFIC_OPTIONS 2023-08-21 23:45:43 +00:00
intel soc/intel/meteorlake: Add PsysPmax configuration 2023-10-24 17:59:29 +00:00
mediatek device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00
nvidia memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
qualcomm device/device.h: Rename pci_domain_scan_bus 2023-10-20 14:24:57 +00:00
rockchip memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
samsung memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
sifive/fu540 memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere 2023-10-11 12:08:22 +00:00
ti src/soc/ti: Remove unnecessary space after casts 2022-11-22 13:42:28 +00:00
ucb/riscv cbmem_top_chipset: Change the return value to uintptr_t 2022-11-18 16:00:45 +00:00