coreboot/src/cpu
Gabe Black bf54108b62 exynos5420: i2c: Fix error handling.
The functions which checked the status of a transfer would return success if
the bus was no longer occupied, even if it's no longer occupied because the
transfer failed. This change modifies those functions to return three possible
values, 0 if the transfer isn't done, -1 if there was a fault, and 1 if the
transaction completed successfully.

BUG=chrome-os-partner:19420
TEST=Built and booted into depthcharge on pit and verified that the PMIC was
initialized successfully by coreboot. Similar changes were tested in
depthcharge when probing the tpm and when communicating with it and corrected
some problems there.
BRANCH=None

Change-Id: If20e0f29688542ba03f08c1da3ebe0429103d33d
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/59733
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
2013-06-24 15:44:27 -07:00
..
amd copy_and_run: drop boot_complete parameter 2013-05-10 11:55:19 -07:00
armltd qemu-armv7 CPU: Move Kconfig code into CPU directory 2013-06-20 15:51:33 -07:00
intel slippy/falco/peppy: Fix SPD GPIO initialization. 2013-06-13 22:16:12 -07:00
samsung exynos5420: i2c: Fix error handling. 2013-06-24 15:44:27 -07:00
via copy_and_run: drop boot_complete parameter 2013-05-10 11:55:19 -07:00
x86 BACKPORT: x86: add cache-as-ram migration option 2013-05-16 15:06:24 -07:00
Kconfig Simplify early / bootblock console code 2013-06-20 13:54:33 -07:00
Makefile.inc cpu: Add CPU microcode file to cbfs with 16-byte alignment 2013-06-12 06:55:42 -07:00