coreboot/src/vendorcode
Joe Moore bf224f85d0 vc/amd/agesa/f16kb/Proc/GNB: Fix out-of-bounds read
Incorrect values read from a different memory region will cause
incorrect computations. VceFlags array size should be 4 based on
similar code in f15 branch, and because
f16kb/Proc/GNB/Modules/GnbInitKB/GnbF1TableKB.c only loads
4 values for VceFlags in DefaultPpF1ArrayKB. Leaving it at 5
results in an out-of-bounds read of PP_FUSE_ARRAY_V2_fld16
in line 901 of
f16kb/Proc/GNB/Modules/GnbGfxIntTableV3/GfxPwrPlayTable.c
when Index reaches 4.

Change-Id: I0242c0634e66616018e6df04ac6f1505b82a630f
Signed-off-by: Joe Moore <awokd@danwin1210.me>
Found-by: Coverity CID 1241878
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38056
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-01-10 14:56:02 +00:00
..
amd vc/amd/agesa/f16kb/Proc/GNB: Fix out-of-bounds read 2020-01-10 14:56:02 +00:00
cavium dram-spd: Remove free() 2019-12-27 16:08:40 +00:00
eltan Drop ROMCC code and header guards 2019-12-19 03:25:05 +00:00
google printf: Automatically prefix %p with 0x 2019-12-11 11:38:59 +00:00
intel vendorcode/intel/fsp/fsp2_0/tgl: Add FSP header files for Tiger Lake 2019-12-26 10:43:42 +00:00
siemens vendorcode/siemens/hwilib: Fix current file string usage 2019-11-29 09:03:41 +00:00
Makefile.inc vendorcode/eltan: Add vendor code for measured and verified boot 2019-06-04 10:41:53 +00:00