coreboot/src
Siyuan Wang becacec022 AMD G34 CPU: change lapic_id in northbridge.c to accommodate G34 CPU
Each G34 socket has two node. Previous lapic algorithm is written for
the CPU which has one node per socket. I test the code on h8qgi with
4 family 15 CPUs(8 cores per CPU). The topology is:
socket 0 --> Node 0, Node 1
socket 2 --> Node 2, Node 3
socket 1 --> Node 4, Node 5
socket 3 --> Node 6, Node 7
Each node has 4 cores.
I change the code according to this topology.

Change-Id: I45f242e0dfc61bd9b18afc952d7a0ad6a0fc3855
Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com>
Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/1659
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-11-07 04:02:54 +01:00
..
arch/x86 Move global variable check to Makefile 2012-11-07 03:57:28 +01:00
boot Add POST code for "All devices initialized" 2012-11-07 03:57:34 +01:00
console Add a capability for mainboard-specific posting. 2012-08-04 19:31:20 +02:00
cpu Leave power control registers unlocked 2012-11-07 03:57:19 +01:00
devices Drop redundant CHIP_NAME in mainboard.c 2012-11-06 21:59:21 +01:00
drivers rtc: force mc146818 register D to a correct value 2012-11-07 03:57:47 +01:00
ec Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
include Add POST code for "All devices initialized" 2012-11-07 03:57:34 +01:00
lib
mainboard Drop redundant CHIP_NAME in mainboard.c 2012-11-06 21:59:21 +01:00
northbridge AMD G34 CPU: change lapic_id in northbridge.c to accommodate G34 CPU 2012-11-07 04:02:54 +01:00
southbridge Fix whitespace issue with help message in Kconfig file 2012-11-07 02:13:51 +01:00
superio smsc/lpc47n227: Make early_serial usable 2012-11-06 21:53:48 +01:00
vendorcode Fix ExecuteFinalHltInstruction function in f15h family code 2012-10-30 05:49:13 +01:00
Kconfig Update SeaBIOS stable to the release-1.7.1 commit 2012-10-16 03:31:05 +02:00
Kconfig.deprecated_options