coreboot/src
Tim Chu be34afad6f mb/ocp/deltalake: Override SMBIOS type 4 cpu voltage
Override SMBIOS type 4 cpu voltage. For Delta Lake, 1.6V is expected.

Tested=Execute "dmidecode -t 4" to check if cpu voltage is correct.

Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: I0ecbec8fb3dc79b8c3f3581d6193aade01bcd68e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
2020-11-22 22:31:58 +00:00
..
acpi ACPI: Define acpi_get_preferred_pm_profile() 2020-11-19 22:58:41 +00:00
arch cpu/intel/common: Fill cpu voltage in SMBIOS tables 2020-11-22 22:31:40 +00:00
commonlib cbfs: Add metadata cache 2020-11-21 10:43:53 +00:00
console console: Override uart base address 2020-11-09 07:46:10 +00:00
cpu cpu/intel/common: Fill cpu voltage in SMBIOS tables 2020-11-22 22:31:40 +00:00
device device/pci: Add NULL check for PCI driver's .ops 2020-11-16 12:15:38 +00:00
drivers drivers/tpm: Move PPI stub 2020-11-22 22:27:29 +00:00
ec ec/google/chromeec: Add more wrappers for regulator control 2020-11-18 06:13:12 +00:00
include cpu/intel/common: Fill cpu voltage in SMBIOS tables 2020-11-22 22:31:40 +00:00
lib cbfs: Add metadata cache 2020-11-21 10:43:53 +00:00
mainboard mb/ocp/deltalake: Override SMBIOS type 4 cpu voltage 2020-11-22 22:31:58 +00:00
northbridge nb/amd/pi: Remove 00660F01 directory & files 2020-11-22 22:29:49 +00:00
security cbfs: Add metadata cache 2020-11-21 10:43:53 +00:00
soc soc/intel/xeon_sp: Work around FSP-T not respecting its own API 2020-11-22 22:26:25 +00:00
southbridge cpu/amd/pi: Remove unused cpu code 00660F01 2020-11-22 22:23:22 +00:00
superio superio/smsc/sio1036: Support 16-bit IO port addressing 2020-11-18 13:12:11 +00:00
vendorcode vendorcode/eltan/security: Add dependency for menu items 2020-11-22 22:27:43 +00:00
Kconfig soc/intel/xeon_sp: Move function debug macros 2020-10-29 16:44:19 +00:00