coreboot/src/northbridge/intel
Keith Hui a911b75848 mb/*: Remove old USB configurations from SNB/bd82x6x boards
Remove USB configurations and data structures from northbridge
devicetree (SNB+MRC boards) and bootblock/romstage C code
(native-only SNB boards). All USB configurations are drawn from
southbridge devicetree going forward.

Change-Id: Ie1cd21077136998a6e90050c95263f2efed68a67
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81882
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-06-08 00:19:23 +00:00
..
common
e7505 cpu/x86: Make 1GB paging the default 2024-06-05 20:31:03 +00:00
gm45 cpu/x86: Make 1GB paging the default 2024-06-05 20:31:03 +00:00
haswell nb/intel/haswell: Synchronize lists of graphics PCI IDs 2024-06-06 23:55:24 +00:00
i440bx cpu/x86: Make 1GB paging the default 2024-06-05 20:31:03 +00:00
i945 cpu/x86: Make 1GB paging the default 2024-06-05 20:31:03 +00:00
ironlake cpu/x86: Make 1GB paging the default 2024-06-05 20:31:03 +00:00
pineview cpu/x86: Make 1GB paging the default 2024-06-05 20:31:03 +00:00
sandybridge mb/*: Remove old USB configurations from SNB/bd82x6x boards 2024-06-08 00:19:23 +00:00
x4x cpu/x86: Make 1GB paging the default 2024-06-05 20:31:03 +00:00