Cliff Huang bc1941f178 soc/intel/alderlake: Add CNVi Bluetooth flag at devicetree entry ... This change adds the corresponding CNVi BT Core enabling flag. TEST: BT is checked using 'lsusb -d 8087:0026' from OS. Change-Id: Iecc10c8946a450350adb34b984cf48ad988097ca Signed-off-by: Cliff Huang <cliff.huang@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51350 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-03-15 06:24:48 +00:00
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amd	soc/amd/cezanne: Add i2c controllers to chipset.cb	2021-03-15 01:15:13 +00:00
cavium	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
example	arch/x86: Move prologue to .init section	2021-01-07 11:02:03 +00:00
intel	soc/intel/alderlake: Add CNVi Bluetooth flag at devicetree entry	2021-03-15 06:24:48 +00:00
mediatek	soc/mediatek/mt8192: devapc: Add domain remap setting	2021-03-15 02:28:32 +00:00
nvidia	src: Remove useless comments in "includes" lines	2021-02-04 10:18:49 +00:00
qualcomm	sc7180: make symbols common accross multiple targets.	2021-03-15 06:23:06 +00:00
rockchip	soc/rockchip/rk3399/sdram: Add channel to error message	2021-03-04 01:22:10 +00:00
samsung	cbfs: Pull handling of the CBFS_CACHE mem_pool into CBFS core	2021-03-08 22:31:29 +00:00
sifive	memlayout: Store region sizes as separate symbols	2021-02-19 08:39:26 +00:00
ti	soc/ti/am335x/header.c: Add missing include	2021-02-03 08:55:15 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00