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coreboot/src/soc
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Marshall Dawson bbf91af9a2 amd/stoneyridge: Remove EXT_CONF_SUPPORT check 
The EXT_CONF_SUPPORT symbol doesn't exist for the Stoney Ridge SoC.
Clean up northbridge.c by removing the check for the config value set.

Remove the CPU initialization code that clears the EnableCf8ExtCfg
bit.  The location where it was set was removed in
  c1d72942 Disable PCI_CFG_EXT_IO

BUG=b:66202622

Change-Id: Ic58c47fc5f568d17f5027c96d4152b0e5b3e1d14
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/21497
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-09-26 16:42:38 +00:00
..
amd amd/stoneyridge: Remove EXT_CONF_SUPPORT check 2017-09-26 16:42:38 +00:00
broadcom/cygnus mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
dmp/vortex86ex soc/dmp/vortex86: Fix CMOS read and random RTC reset 2017-08-01 13:20:15 +00:00
imgtec/pistachio mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
intel soc/intel: lpc: Use IS_POWER_OF_2 instead of open-coding it 2017-09-25 23:38:43 +00:00
lowrisc/lowrisc soc/lowrisc: Place CBMEM at top of autodetected RAM 2016-12-06 18:51:13 +01:00
marvell/mvmap2315 Update files with no newline at the end 2017-07-24 15:08:16 +00:00
mediatek/mt8173 mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
nvidia mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
qualcomm mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
rockchip include/device: Split i2c.h into three 2017-08-18 15:33:29 +00:00
samsung mb/*/*: Remove rtc nvram configurable baud rate 2017-09-23 11:06:25 +00:00
ucb/riscv soc/ucb/riscv: Place CBMEM at top of autodetected RAM 2016-12-06 18:48:28 +01:00