coreboot/src/soc
Huayang Duan bb7f4c7a4f mediatek/mt8183: Correct MPU ctrl register address
Remove unused members in emi_mpu_regs and sdram_params. Change
mpu_ctrl_d to array so the offset (0x804) for D1 is corrected.

BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui, and inits DRAM successfully with related
patches.

Change-Id: I95c002058dc5e1cba868334fecf8f42bd3e497e6
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/29251
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-26 11:20:35 +00:00
..
amd soc/amd/common/def_callouts.c: Prefer using '"%s...", __func__' 2018-10-25 16:54:39 +00:00
broadcom src: Remove unneeded whitespace 2018-10-23 15:52:09 +00:00
cavium soc/cavium/cn81xx: Drop dead do_soft_reset() implementation 2018-10-17 12:02:35 +00:00
imgtec soc/imgtech/pistachio: Convert to board_reset() 2018-10-22 08:34:33 +00:00
intel soc/intel/cannonlake: Add back PM TIMER EMULATION 2018-10-26 11:20:00 +00:00
mediatek mediatek/mt8183: Correct MPU ctrl register address 2018-10-26 11:20:35 +00:00
nvidia src: Remove unneeded whitespace 2018-10-23 15:52:09 +00:00
qualcomm Move compiler.h to commonlib 2018-10-08 16:57:27 +00:00
rockchip src: Remove unneeded whitespace 2018-10-23 15:52:09 +00:00
samsung src: Remove unneeded whitespace 2018-10-23 15:52:09 +00:00
sifive soc/sifive/fu540: Document #if ENV_ROMSTAGE line 2018-09-26 18:52:54 +00:00
ucb arch/riscv: provide a monotonic timer 2018-09-14 09:28:06 +00:00