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coreboot/src/soc/intel
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Lee Leahy baf25a0e50 UPSTREAM: soc/intel/quark: Clear SMI interrupts and wake events 
Migrate the clearing of the SMI interrupts and wake events from FSP into
coreboot.

TEST=Build and run on Galileo Gen2

Change-Id: Ia369801da87a16bc00fb2c05475831ebe8a315f8
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/14945
Original-Reviewed-by: Martin Roth <martinroth@google.com>
(cherry-picked from commit 7f4b053980)
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/348415
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2016-06-02 14:06:43 -07:00
..
apollolake UPSTREAM: intel/apollolake: Add car.c to verstage 2016-06-02 14:06:39 -07:00
baytrail soc/intel: indicate to build system that XIP_ROM_SIZE isn't used 2016-05-06 16:50:00 +02:00
braswell soc/intel: indicate to build system that XIP_ROM_SIZE isn't used 2016-05-06 16:50:00 +02:00
broadwell {cpu,soc}/intel: remove unused smm_init() function 2016-05-06 16:48:21 +02:00
common UPSTREAM: soc/intel/common: Add common smihandler code 2016-05-26 03:21:59 -07:00
fsp_baytrail {cpu,soc}/intel: remove unused smm_init() function 2016-05-06 16:48:21 +02:00
fsp_broadwell_de soc/intel/fsp_broadwell_de: convert to using common MP init 2016-05-06 16:41:01 +02:00
quark UPSTREAM: soc/intel/quark: Clear SMI interrupts and wake events 2016-06-02 14:06:43 -07:00
sch UPSTREAM: intel/sch: Merge northbridge and southbridge in src/soc 2016-05-20 17:08:20 -07:00
skylake UPSTREAM: skylake: Add SD card device to configure card detect GPIO 2016-06-01 20:36:53 -07:00