vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/ is still needed due to Intel FSP repo does not ship all header files. TEST=Build and boot on intel/archercity CRB Change-Id: I778d3535c273dff653330518653bdefcb45e66f4 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Shuo Liu <shuo.liu@intel.com> Signed-off-by: Jincheng Li <jincheng.li@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80360 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| amd | ||
| cavium | ||
| eltan | ||
| intel | ||
| mediatek | ||
| siemens | ||
| wuffs | ||
| Makefile.mk | ||
| README.md | ||
The files in the coreboot src/vendorcode subdirectory are supplied by various hardware and software vendors to support their platforms. While these directories and files are a part of the coreboot project, their licenses, coding styles, and maintenance may be significantly different than the rest of the coreboot codebase.
By contributing these directories and files to the coreboot codebase, the authors and copyright holders have agreed to the use and modification of these files by the coreboot community, however the final ownership and responsibility still remains with the company that contributed the files.
The ideal goal would be to properly integrate these files into coreboot proper. But such undertakings should be coordinated with the owners. Community modification should in general be limited to fixing issues and adding functionality.
Licenses for the files were determined by the copyright holder when the files were contributed. All files here must have an open source license compatible with coreboot's GPL v2.