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coreboot/src/cpu/intel
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Edward O'Callaghan ba92428514 intel: Make monotonic timer a first class citizen 
The monotonic time now needs to be a first class citizen in Coreboot as
it is a hard dependency of the drivers/spi flash command polling
function.

Change-Id: I4e43d2680bf84bc525138f71c2b813b0f6be5265
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6135
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-07-05 00:38:06 +02:00
..
car Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR 2014-01-15 15:26:48 +01:00
ep80579 Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
fit x86 intel: Add Firmware Interface Table support 2013-03-17 22:53:51 +01:00
fsp_model_206ax intel: Make monotonic timer a first class citizen 2014-07-05 00:38:06 +02:00
haswell intel: Make monotonic timer a first class citizen 2014-07-05 00:38:06 +02:00
hyperthreading Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT 2014-05-10 11:27:25 +02:00
microcode intel: fix microcode compilation failure in bootblock 2014-01-28 19:54:29 +01:00
model_6bx Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_6dx Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_6ex Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_6fx Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_6xx Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_65x Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_67x Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_68x Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_69x Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_106cx Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_206ax intel: Make monotonic timer a first class citizen 2014-07-05 00:38:06 +02:00
model_1067x Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_2065x intel: Make monotonic timer a first class citizen 2014-07-05 00:38:06 +02:00
model_f0x Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_f1x Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_f2x Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_f3x Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
model_f4x Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
slot_1 cpu/intel: Make all Intel CPUs load microcode from CBFS 2014-01-16 05:34:25 +01:00
slot_2 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
socket_441 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
socket_BGA956
socket_FC_PGA370 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
socket_LGA771
socket_LGA775 Fix socket LGA775 2013-03-07 00:46:32 +01:00
socket_mFCBGA479
socket_mFCPGA478
socket_mPGA478
socket_mPGA479M
socket_mPGA603
socket_mPGA604
socket_PGA370 cpu/intel: Make all Intel CPUs load microcode from CBFS 2014-01-16 05:34:25 +01:00
socket_rPGA988B cpu/intel: Add CPU socket rPGA988B 2014-05-13 21:58:16 +02:00
socket_rPGA989
speedstep
thermal_monitoring
turbo cpu/intel: allow non-packaged scoped turbo setting 2014-01-30 06:10:26 +01:00
Kconfig cpu/intel: Add CPU socket rPGA988B 2014-05-13 21:58:16 +02:00
Makefile.inc cpu/intel: Add CPU socket rPGA988B 2014-05-13 21:58:16 +02:00