coreboot/src/soc/amd/common
Raul E Rangel b95f848766 soc/amd: Make espi_clear_decodes private
espi_setup already clears most of the controller registers. So this
change consolidates the clear logic into one spot.

This shouldn't result in a behavior change on Picasso. Picasso already
has the eSPI decodes clear on boot, so this change is a nop.

BUG=b:183524609
TEST=Boot guybrush to the OS

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ic57689e50febd29796d8ac8d99c81e41fee5b41c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-04-05 16:39:11 +00:00
..
acpi soc/amd,mb/google/,mb/amd: Move sleepstates.asl 2021-03-08 23:30:38 +00:00
block soc/amd: Make espi_clear_decodes private 2021-04-05 16:39:11 +00:00
fsp soc/amd/picasso: move chipset_handle_reset to common 2020-12-11 17:44:19 +00:00
vboot soc/amd/common/vboot: use transfer_buffer_valid function 2020-11-30 16:29:14 +00:00
Kconfig.common soc/amd/common/*/Kconfig: remove unneeded default n for bool options 2021-02-16 23:54:54 +00:00
Makefile.inc soc/amd/picasso: move chipset_handle_reset to common 2020-12-11 17:44:19 +00:00