coreboot/src
Paul Menzel b92df578b4 mb/asus/f2a85-m: Disable HUDSON_LEGACY_FREE for working serial console
The Asus F2A85-M, F2A85-M LE and F2A85-M PRO all have a Super I/O, and
therefore have legacy devices like a serial console.

Selecting `HUDSON_LEGACY_FREE` currently disable the serial console
during bootup in romstage, which is undesired.

So, deselect the symbol by default.

TEST=Boot Asus F2A85-M PRO and verify serial console is *not* disabled
during romstage.
Change-Id: Ia6588c0d4b2c24c7cb9da04805d13274c8ae295e
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47363
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-10 19:00:18 +00:00
..
acpi acpigen: Add more useful helper functions 2020-11-09 07:30:01 +00:00
arch arch/x86/smbios: Populate SMBIOS type 7 with cache information 2020-10-26 06:54:04 +00:00
commonlib lib/libpayload: Replace strapping_ids with new board configuration entry 2020-10-30 15:25:28 +00:00
console console: Override uart base address 2020-11-09 07:46:10 +00:00
cpu cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registers 2020-11-10 06:18:05 +00:00
device device: Move pci_dev_is_wake_source function 2020-11-09 07:37:57 +00:00
drivers drivers/wifi: Check device is of type PCI before checking vendor ID 2020-11-10 05:17:16 +00:00
ec ec/purism/librem/ec.asl: End comment 2020-11-09 07:28:53 +00:00
include cpu/x86/mtrr.h: Rename CORE2 alternative SMRR registers 2020-11-10 06:18:05 +00:00
lib lib/libpayload: Replace strapping_ids with new board configuration entry 2020-10-30 15:25:28 +00:00
mainboard mb/asus/f2a85-m: Disable HUDSON_LEGACY_FREE for working serial console 2020-11-10 19:00:18 +00:00
northbridge nb/intel/pineview: Fix clearing memory 2020-11-09 07:28:01 +00:00
security sec/intel/cbnt: Stitch in ACMs in the coreboot image 2020-11-10 06:17:24 +00:00
soc soc/intel/tigerlake: Log PM event from an internal device 2020-11-10 06:20:19 +00:00
southbridge sb/intel/lynxpoint/pcie.c: Ensure OBFF is disabled 2020-11-07 14:20:38 +00:00
superio superio/nuvoton: Factor out equivalent Kconfig option 2020-10-19 07:06:20 +00:00
vendorcode vc/intel/FSP2_0/CPX-SP: update to ww45 release and add watermark option 2020-11-07 00:12:35 +00:00
Kconfig soc/intel/xeon_sp: Move function debug macros 2020-10-29 16:44:19 +00:00