coreboot/src
Angel Pons b82b4314ad src: Never set ISA Enable on PCI bridges
Looks like no one really knows what this bit would be useful for, nor
when it would need to be set. Especially if coreboot is setting it even
on PCI *Express* bridges. Digging through git history, nearly all
instances of setting it on PCIe bridges comes from i82801gx, for which
no reason was given as to why this would be needed. The other instances
in Intel code seem to have been, unsurprisingly, copy-pasted.

Drop all uses of this definition and rename it to avoid confusion. The
negation in the name could trick people into setting this bit again.

Tested on Asrock B85M Pro4, no visible difference.

Change-Id: Ifaff29561769c111fb7897e95dbea842faec5df4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2020-07-28 10:54:02 +00:00
..
acpi src/acpi/device.c: Add include <types.h> 2020-07-26 21:34:21 +00:00
arch ACPI S3: Clean up resume path 2020-07-28 10:37:28 +00:00
commonlib src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
console console: Update for vboot before bootblock 2020-06-15 22:07:12 +00:00
cpu cpu/intel/car/romstage.c: Remove unused <bootblock_common.h> 2020-07-26 21:38:22 +00:00
device src: Never set ISA Enable on PCI bridges 2020-07-28 10:54:02 +00:00
drivers Revert "src: Remove unused include <cpu/x86/smm.h>" 2020-07-28 06:05:20 +00:00
ec ec/lenovo/h8: Align macro values in one column 2020-07-26 21:40:00 +00:00
include src: Never set ISA Enable on PCI bridges 2020-07-28 10:54:02 +00:00
lib ACPI S3: Clean up resume path 2020-07-28 10:37:28 +00:00
mainboard mb/amd/mandolin: remove ACPI_FADT_RESET_REGISTER from fadt_flags 2020-07-28 10:21:18 +00:00
northbridge nb/amd/pi/00730F01/northbridge.c: Add include <types.h> 2020-07-26 21:36:06 +00:00
security src: Change BOOL CONFIG_ to CONFIG() in comments & strings 2020-07-26 21:20:30 +00:00
soc src: Never set ISA Enable on PCI bridges 2020-07-28 10:54:02 +00:00
southbridge src: Never set ISA Enable on PCI bridges 2020-07-28 10:54:02 +00:00
superio superio/common: Avoid NULL pointer dereference 2020-07-24 21:21:09 +00:00
vendorcode amd/picasso: rework USB2 PHY tune parameter handling 2020-07-26 17:08:00 +00:00
Kconfig arch/x86: Remove RELOCATABLE_RAMSTAGE 2020-07-06 06:17:47 +00:00