Martin Roth b5b1c5a7da soc/amd/common: Update SPI based on Kconfig & EFS instead of devtree ... Get the settings for fast-read and mode from EFS, and reprogram those. Program Normal reads, Alt-mode, and TPM speeds from Kconfig settings. BUG=b:195943311 TEST=Boot and see that SPI was set to the correct speed & mode Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I8a24f637b2a0061f60a8f736121d224d4c4ba69b Reviewed-on: https://review.coreboot.org/c/coreboot/+/56959 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>		2021-08-30 18:34:48 +00:00
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cezanne	soc/amd/cezanne/chip: add functionality to power down eMMC interface	2021-08-29 20:58:51 +00:00
common	soc/amd/common: Update SPI based on Kconfig & EFS instead of devtree	2021-08-30 18:34:48 +00:00
picasso	acpi: Fill fadt->century based on Kconfig	2021-08-19 18:16:04 +00:00
stoneyridge	acpi: Fill fadt->century based on Kconfig	2021-08-19 18:16:04 +00:00
Kconfig