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Paul Menzel b536b7e032 UPSTREAM: mainboards: Dont select CONSOLE_POST
Currently, its impossible for the user to select `NO_POST`, for boards
selecting `CONSOLE_POST` in their config.

```
warning: (BOARD_SPECIFIC_OPTIONS) selects CONSOLE_POST which has unmet
direct dependencies (VENDOR_SIEMENS && BOARD_SIEMENS_MC_BDX1 || !NO_POST)
```

This is currently done for Intel Camelback Mountain and Siemens MC-BDX1.

Selecting the option `CONSOLE_POST` in board specific configuration is
not a good idea, as this should be user configurable over Kconfig, and
also the tree-wide defaults should be the same for these options.

Kconfig is different, as commit 97535558f1 (mainboard/{google,intel}:
Change config option selection) only touch the Intel board.

BUG=none
BRANCH=none
TEST=none

Change-Id: Ie93d38b3c82261458534993b856737f9ea5d019c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 98adaf5989
Original-Change-Id: I91c1e0cb92ed218b6bbc7c33759b91f748cf6f51
Original-Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Original-Reviewed-on: https://review.coreboot.org/18878
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://chromium-review.googlesource.com/458346
2017-03-22 10:08:23 -07:00
configs UPSTREAM: configs/builder: Remove pre-defined VGA bios file 2017-01-22 05:03:18 -08:00
Documentation UPSTREAM: arch/x86/acpigen: Provide helper functions for enabling/disabling GPIO 2017-02-25 00:02:39 -08:00
payloads UPSTREAM: tint: Add USB support 2017-03-20 17:33:14 -07:00
src UPSTREAM: mainboards: Dont select CONSOLE_POST 2017-03-22 10:08:23 -07:00
util UPSTREAM: util/cbfstool: avoid memleaks and off-by-ones 2017-03-22 10:08:20 -07:00
.checkpatch.conf Drop --exclude statement from .checkpatch.conf 2017-03-13 17:53:59 -07:00
.clang-format
.gitignore UPSTREAM: .gitignore: ignore *.swo and option *.roms 2017-03-10 10:54:46 -08:00
.gitmodules
.gitreview
COMMIT-QUEUE.ini
COPYING
gnat.adc UPSTREAM: gnat.adc: Do not generate assertion code for Refined_Post 2016-11-03 14:44:05 -07:00
MAINTAINERS UPSTREAM: MAINTAINERS: Update list 2017-03-08 05:13:03 -08:00
Makefile UPSTREAM: build system: mark sub-make invocations as parallelizable 2017-01-31 17:07:38 -08:00
Makefile.inc UPSTREAM: Makefile.inc: Explicitly set GNU11 as C language standard 2017-02-02 12:29:30 -08:00
PRESUBMIT.cfg
README UPSTREAM: Remove extra newlines from the end of all coreboot files. 2016-08-04 23:36:56 -07:00
toolchain.inc UPSTREAM: Add minimal GNAT run time system (RTS) 2016-09-21 19:36:46 -07:00

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.