Aaron Durbin d3f4dcc331 haswell: split microcode between ULT and non-ULT ... The current microcode blobs contain both ULT and non-ULT revisions. Only include one or the other based off of the CONFIG_INTEL_LYNXPOINT_LP Kconfig option. BUG=chrome-os-partner:19035 BRANCH=none TEST=emerge-fox_wtm2 chromeos-coreboot-fox and inspected microcode FIT entries. Change-Id: I3e4e41d4cd727b1a974361fb469267e6f6022d5a Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50318 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>		2013-05-07 14:58:30 -07:00
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arch	x86: call cbfstool update-fit when fit selected	2013-05-07 14:58:29 -07:00
console	console: Make use of CONFIG_USE_OPTION_TABLE	2013-04-01 20:54:48 +02:00
cpu	haswell: split microcode between ULT and non-ULT	2013-05-07 14:58:30 -07:00
device	device tree: track init times	2013-05-01 15:36:25 -07:00
drivers	[2/2] tps65090: re-factor for coreboot	2013-04-30 18:24:39 -07:00
ec	Fix Google ChromeEC driver	2013-05-01 10:55:09 -07:00
include	exynos5250/snow: deprecate time.h	2013-05-06 20:49:41 -07:00
lib	call fill_lb_framebuffer() earlier	2013-05-02 22:18:20 -07:00
mainboard	exynos5250/snow: deprecate time.h	2013-05-06 20:49:41 -07:00
northbridge	BACKPORT: boot: remove cbmem_post_handling()	2013-05-01 14:30:41 -07:00
southbridge	lynxpoint: Expose ACPI Device for LP GPIO controller	2013-05-06 15:48:40 -07:00
superio	Winbond W83627HF: Rename and move ASL snippet to acpi/superio.asl	2013-04-01 21:09:24 +02:00
vendorcode	Eliminate use of pointers in coreboot table	2013-04-22 11:57:06 -07:00
Kconfig	BACKPORT: coreboot: add timer queue implementation	2013-05-01 14:30:57 -07:00