coreboot/src/soc/intel/cannonlake
Angel Pons 5d805f64f9 soc/intel/cannonlake: Fix PCH-H IRQ constraints
Cannon Point PCH-H does not implement the eMMC, I2C4 and I2C5 devices.
Guard the IRQ constraints for these devices to prevent FSP assertions.

Tested on Prodrive Hermes, debug FSP builds no longer fail to boot.

Change-Id: I58674d1c3c5fe4535c022020674d48d6a5315bf9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57092
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-08-25 19:27:23 +00:00
..
acpi soc/intel/cannonlake: Use new IRQ module 2021-06-29 21:53:49 +00:00
bootblock soc/intel/cannonlake: Make use of `cpu/intel/cpu_ids.h' 2021-07-17 09:51:38 +00:00
include/soc Revert "src/soc/intel/cannonlake: Update C-state latency control limits" 2021-08-19 18:17:00 +00:00
romstage soc/intel/cannonlake: Merge soc_memory_init_params() into its caller 2021-05-10 14:17:48 +00:00
acpi.c soc/intel: Drop casts around soc_read_pmc_base() 2021-06-28 04:16:48 +00:00
chip.c soc/intel/cannonlake: Use new IRQ module 2021-06-29 21:53:49 +00:00
chip.h soc/intel/cannonlake: Allow to configure maximum package C state 2021-08-04 15:15:42 +00:00
cnl_memcfg_init.c spd_bin: Replace get_spd_cbfs_rdev() with spd_cbfs_map() 2021-03-17 08:10:35 +00:00
cpu.c soc/intel/cannonlake: Unbreak some short lines 2021-08-20 02:27:03 +00:00
dptf.c dptf: Move platform-specific information to struct dptf_platform_info 2021-04-13 08:22:49 +00:00
elog.c soc/intel/cannonlake/elog.c: Define __SIMPLE_DEVICE__ 2021-04-19 10:44:53 +00:00
finalize.c Move post_codes.h to commonlib/console/ 2021-08-04 15:15:51 +00:00
fsp_params.c soc/intel/cannonlake: Fix PCH-H IRQ constraints 2021-08-25 19:27:23 +00:00
gpio.c soc/intel/{skl,cnl}: add NMI_{EN,STS} registers 2020-12-04 00:10:38 +00:00
gpio_cnp_h.c soc/intel/{skl,cnl}: add NMI_{EN,STS} registers 2020-12-04 00:10:38 +00:00
gpio_common.c soc/intel: Replace open-coded buffer length calculation 2021-04-21 14:21:44 +00:00
graphics.c soc/intel/cnl: add panel and backlight configuration code 2021-01-01 21:12:45 +00:00
gspi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
i2c.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Kconfig src/*: Specify type of CBFS_SIZE once 2021-07-26 14:02:57 +00:00
lockdown.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
lpc.c src: Match array format in function declarations and definitions 2021-05-13 18:34:38 +00:00
Makefile.inc cpu/x86: Only include smm code if CONFIG_HAVE_SMI_HANDLER=y 2021-05-18 16:54:21 +00:00
me.c soc/intel/cannonlake: Align cosmetics with Ice Lake 2020-10-12 20:59:17 +00:00
nhlt.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
p2sb.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
pmc.c soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c 2021-04-21 09:17:40 +00:00
pmutil.c soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c 2021-04-21 09:17:40 +00:00
reset.c soc/intel: Use of common reset code block 2020-11-02 10:43:53 +00:00
sd.c soc/intel/cannonlake: Align cosmetics with Ice Lake 2020-10-12 20:59:17 +00:00
smihandler.c soc/intel/cannonlake: Make use of is_devfn_enabled() function 2021-06-16 03:48:29 +00:00
spi.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
systemagent.c soc/intel: Replace SA_PCIEX_LENGTH Kconfig options 2021-01-30 23:14:08 +00:00
uart.c soc/intel/*: drop UART pad configuration from common code 2021-03-12 08:48:03 +00:00
vr_config.c soc/intel/cannonlake/vr_config: Print configured values 2021-08-04 15:15:35 +00:00
xhci.c soc/intel/common: Adapt XHCI elog driver for reuse 2020-12-10 17:45:47 +00:00