coreboot/src
Felix Held b455dd3486 soc/amd/cezanne,picasso/include/southbridge: fix typo in define
In both the Picasso PPR (rev 3.16) and the Cezanne PPR (rev 3.03) bit 16
of the misc I2C pad control registers is defined as BiasCrtEn, so rename
I2C_PAD_CTRL_BIOS_CRT_EN to I2C_PAD_CTRL_BIAS_CRT_EN.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: If39ac17a433cb90c944fdde038cd246a995e193a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59028
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-11-09 23:20:55 +00:00
..
acpi treewide: Replace bad uses of find_resource 2021-11-04 17:37:13 +00:00
arch pci_mmio_cfg: Move guard around pci_s_* functions to x86 2021-11-09 11:04:10 +00:00
commonlib drivers/intel/fsp2_0: Allow FSP-M to be relocated 2021-11-08 19:58:46 +00:00
console
cpu cpu/intel: Use unsigned types in get_cpu_count() 2021-11-05 15:30:34 +00:00
device treewide: Replace bad uses of find_resource 2021-11-04 17:37:13 +00:00
drivers ChromeOS: Fix <vc/google/chromeos/chromeos.h> 2021-11-09 00:14:46 +00:00
ec ChromeOS: Fix <vc/google/chromeos/chromeos.h> 2021-11-09 00:14:46 +00:00
include pci_mmio_cfg: Always use pci_s_* functions 2021-11-09 11:05:33 +00:00
lib src/lib: Add FW_CONFIG_SOURCE_VPD 2021-11-08 14:48:05 +00:00
mainboard mb/google/brya/var/redrix: Set RFI Spread Spectrum to 6% 2021-11-09 20:48:26 +00:00
northbridge nb/intel/haswell/northbridge.c: Drop stale comment 2021-11-05 05:57:16 +00:00
security security/intel/txt: Get addr bits at runtime 2021-11-01 15:59:54 +00:00
soc soc/amd/cezanne,picasso/include/southbridge: fix typo in define 2021-11-09 23:20:55 +00:00
southbridge sb/intel: Replace bad uses of find_resource 2021-11-04 17:32:06 +00:00
superio superio: Replace bad uses of find_resource 2021-11-04 17:36:32 +00:00
vendorcode ChromeOS: Fix <vc/google/chromeos/chromeos.h> 2021-11-09 00:14:46 +00:00
Kconfig src/lib: Add FW_CONFIG_SOURCE_VPD 2021-11-08 14:48:05 +00:00