Aaron Durbin b4302504e3 drivers/intel/fsp2_0: implement common memory_init() tasks ... Instead of performing the same tasks in the chipset code move the common sequences into the FSP 2.0 driver. This handles the S3 paths as well as saving and restoring the memory data. The chipset code can always override the settings if needed. BUG=chrome-os-partner:52679 Change-Id: I098bf95139a0360f028a50aa50d16d264bede386 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/15739 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>		2016-07-19 20:15:33 +02:00
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fsp1_0	Fix some cbmem.h includes	2016-06-17 00:18:28 +02:00
fsp1_1	drivers/intel/fsp1_1: align on using ACPI_Sx definitions	2016-07-15 08:31:09 +02:00
fsp2_0	drivers/intel/fsp2_0: implement common memory_init() tasks	2016-07-19 20:15:33 +02:00
gma	intel/gma: Fix VBT generation	2016-04-01 15:34:11 +02:00
i210	intel/i210: Change API for function mainboard_get_mac_address()	2016-07-05 06:27:44 +02:00
wifi	drivers/intel/wifi: Add support for generating SSDT table	2016-06-02 05:36:08 +02:00