coreboot/src/southbridge
Rudolf Marek 6181e3dcd7 amd/agesa/hudson: Implement PNP resource setup in LPC bridge
The previous SBxxx generations were setting up LPC bridge based
on the PNP resources. Implement it also for AGESA Hudson.
The AGESA itself opens one big region DFLT_SIO_PME_BASE_ADDRESS
(512 bytes). Make the code smart enough to detect already used
region and if any resource fits into AGESA defined region, do nothing.

Change-Id: I718d034bc4c778697a7bd0506d4550c8f5a43159
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Reviewed-on: http://review.coreboot.org/4497
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-04-06 18:03:52 +02:00
..
amd amd/agesa/hudson: Implement PNP resource setup in LPC bridge 2014-04-06 18:03:52 +02:00
broadcom Remove PCI_ROM_RUN option 2013-12-24 14:40:49 +01:00
dmp vortex86ex: Drop baudrate programming for 10 UARTs 2014-02-17 09:14:55 +01:00
intel bd82x6x, ibexpeak, lynxpoint: Unify SPI. 2014-03-04 00:00:57 +01:00
nvidia usbdebug: Remove EHCI_DEBUG_OFFSET 2014-02-16 20:10:54 +01:00
rdc x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
ricoh GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
sis usbdebug: Remove EHCI_DEBUG_OFFSET 2014-02-16 20:10:54 +01:00
ti GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
via uart8250: Drop includes in superio 2014-02-06 11:17:24 +01:00
Kconfig Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00
Makefile.inc Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00