coreboot/src/vendorcode
Jon Murphy d5b1f547c3 vc/amd/fsp/sabrina: Update PSP header to set the SOC FW ID
Update the PSP header to set the SOC FW ID to 0x0149 for
this platform

BUG=b:217414563
TEST=Build and verify header is set correctly

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: Ic604ec96560c2d4d89c48c4a27528c5cfe4ca7e7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-05-20 11:18:41 +00:00
..
amd vc/amd/fsp/sabrina: Update PSP header to set the SOC FW ID 2022-05-20 11:18:41 +00:00
cavium rules.h: Use more consistent naming 2022-05-16 21:52:22 +00:00
eltan vc/eltan/security/verified_boot/Makefile: add fmap_config.h dependency 2022-02-22 15:56:03 +00:00
google vendorcode/google/sar.c: Fix formatted print of size_t 2022-05-13 11:03:07 +00:00
intel soc/intel/jasperlake: Revert CdClock setting 2022-04-27 17:15:13 +00:00
mediatek vc/mediatek/mt8195: Fix rank1 CKE setting for single-rank DRAM 2021-12-01 09:48:17 +00:00
siemens cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
Makefile.inc soc/mediatek/mt8192: initialize DRAM using vendor reference code 2021-03-08 03:15:43 +00:00