coreboot/src
Duncan Laurie 4acd3c05d6 rambi: Enable DPTF
This enables the DPTF framework, but it doesn't do much
without some sort of kernel+user components to drive it.

BUG=chrome-os-partner:17279
BRANCH=none
TEST=build and boot on rambi, dump DSDT and look over \_SB.DPTF

Change-Id: Icb632a6e70c3912bbdfa6ef3f5c87cd79d2b8a3a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179480
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5003
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-09 05:43:01 +02:00
..
arch Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
console console: Fix UART selection prompt 2014-04-30 23:47:28 +02:00
cpu Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
device Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00
drivers drivers/pc80/Kconfig: Do not init PS/2 keyboard if GRUB 2 is chosen as payload 2014-05-02 15:05:07 +02:00
ec baytrail: Basic DPTF framework 2014-05-09 05:42:52 +02:00
include Declare get_write_protect_state() without ChromeOS 2014-05-08 16:25:30 +02:00
lib ChromeOS boards: Always build code for bootmode straps 2014-05-08 16:26:58 +02:00
mainboard rambi: Enable DPTF 2014-05-09 05:43:01 +02:00
northbridge northbridge/intel/sandybridge/pei_data.h: Fix typo in hig*h*est in comment 2014-05-06 13:55:39 +02:00
soc baytrail: Basic DPTF framework 2014-05-09 05:42:52 +02:00
southbridge AGESA SPI: Fix Kconfig options 2014-04-29 17:31:40 +02:00
superio superio/fintek/f71869ad: Make hwm devicetree configurable 2014-05-08 12:10:55 +02:00
vendorcode Declare get_write_protect_state() without ChromeOS 2014-05-08 16:25:30 +02:00
Kconfig Introduce stage-specific architecture for coreboot 2014-05-06 20:23:31 +02:00