Jon Murphy d4e07090ff soc/amd/sabrina,vc/amd/fsp/sabrina: Add UART support for Sabrina ... Sabrina previously didn't support UART mapping in psp verstage. Now that it has been enabled, add the relevant uart code here. BUG=b:218709292 TEST=Set serial soft fuse, boot to kernel, check logs Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I591fa69b6e722929839babfff62e9d56c68e1112 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65532 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2022-07-06 15:06:19 +00:00
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amd	soc/amd/sabrina,vc/amd/fsp/sabrina: Add UART support for Sabrina	2022-07-06 15:06:19 +00:00
cavium	rules.h: Use more consistent naming	2022-05-16 21:52:22 +00:00
eltan	vc/eltan/security/verified_boot/Makefile: add fmap_config.h dependency	2022-02-22 15:56:03 +00:00
google	treewide: Unify Google branding	2022-07-04 14:02:26 +00:00
intel	vc/intel/fsp2_0: Add UPDs into the FSP partial header version 2222	2022-07-03 04:57:33 +00:00
mediatek	vc/mediatek/mt8195: Fix rank1 CKE setting for single-rank DRAM	2021-12-01 09:48:17 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	soc/mediatek/mt8192: initialize DRAM using vendor reference code	2021-03-08 03:15:43 +00:00