Meera Ravindranath b143e677ee src/soc/tigerlake: Accomodate JSP specific changes in iomap.h ... Updating MCH, GSPI And I2C base addresses for JSP in iomap header. BUG=None BRANCH=None TEST=Compilation for Jasper lake board is working Change-Id: Ia8e88e02989fe80d7bd1f28942e005cb0d862fcb Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com> Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38754 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2020-02-17 15:54:57 +00:00
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amd	vboot: remove VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT option	2020-02-17 08:08:35 +00:00
cavium	soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>	2019-12-19 05:38:43 +00:00
intel	src/soc/tigerlake: Accomodate JSP specific changes in iomap.h	2020-02-17 15:54:57 +00:00
mediatek	soc/mediatek: dsi: Correct bits_per_pixel for MIPI_DSI_FMT_RGB666	2020-02-17 15:39:09 +00:00
nvidia	commonlib: Add commonlib/bsd	2020-01-28 06:36:13 +00:00
qualcomm	sc7180: clock: Fix QUP DFSR configuration for perf levels	2020-02-07 23:12:00 +00:00
rockchip	src: Replace min/max() with MIN/MAX()	2019-12-20 17:49:29 +00:00
samsung	src/soc/samsung: Remove unused <stdlib.h>	2019-12-19 05:39:09 +00:00
sifive	src: Replace min/max() with MIN/MAX()	2019-12-20 17:49:29 +00:00
ucb	mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.	2019-12-06 15:09:48 +00:00