61d74dc8f7
This commit extends libpayload's understanding of SPI flash devices by adding a flags field to both struct cb_spi_flash and struct sysinfo_t.spi_flash. The new CB_SPI_FLASH_FLAG_IN_4BYTE_ADDR_MODE flag will be populated from the coreboot table's lb_spi_flash entry. This allows payloads to reliably determine if the SPI flash is currently configured for 4-byte addressing, enabling more robust flash operations without needing to re-probe or re-enforce the mode. Note: `erase_cmd` type was changed from uint32_t to uint8_t. This is because only the lowest byte of the original uint32_t was ever used. The change ensures proper sizing, maintains compatibility with older coreboot tables, and makes the remaining space available for new fields. BUG=b:417900125 TEST=Able to build google/bluey. Change-Id: I101a50f899e82e9412024a049a9df59c5813313a Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/88182 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| coreinfo | ||
| external | ||
| libpayload | ||
| linuxcheck | ||
| nvramcui | ||
| Kconfig | ||
| Makefile.mk | ||