coreboot/src
Varshit Pandya b0d0de2ba6 mb/amd/onyx: rename to onyx_poc
Even though this mainboard is called 'Onyx', the openSIL implementation
and the corresponding coreboot integration is only a proof of concept
that isn't fully featured, has known limitations and bugs, and is not
meant for or ready to being productized. Adding the proof of concept
suffix to the name should point this out clearly enough so that no
potential customer could infer that this might be a fully functional
and supported implementation which it is not.

Change-Id: I157a8fffdc2a8543465fe8d444ac87f3f417389f
Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77896
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-12-16 20:15:02 +00:00
..
acpi acpi: Add support for WDAT table 2023-12-15 19:08:45 +00:00
arch arch/arm64/armv8/Makefile.inc: Add clang -target for .ld CPP 2023-12-12 12:23:53 +00:00
commonlib vendorcode/amd/opensil: Add initial setup and API calls 2023-12-06 18:32:58 +00:00
console Allow to build romstage sources inside the bootblock 2023-11-09 13:20:18 +00:00
cpu cpu/intel/model_206ax: Use macro IS_IVY_CPU 2023-12-04 15:54:45 +00:00
device device/Kconfig: rename AZALIA_PLUGIN_SUPPORT to AZALIA_HDA_CODEC_SUPPORT 2023-11-10 15:27:58 +00:00
drivers drivers/uart/pl011.c Perform basic UART init 2023-12-13 14:27:09 +00:00
ec drivers/ipmi to lib: Fix misspellings & capitalization issues 2023-12-13 10:42:30 +00:00
include acpi: Add support for WDAT table 2023-12-15 19:08:45 +00:00
lib lib: ramdetect: Add Kconfig PROBE_RAM 2023-12-14 14:21:33 +00:00
mainboard mb/amd/onyx: rename to onyx_poc 2023-12-16 20:15:02 +00:00
northbridge sb/intel/bd82x6x: assign EHCI controller ops in chipset devicetree 2023-12-06 16:20:24 +00:00
sbom sbom/Makefile.inc: Change GOPATH 2023-11-20 14:32:54 +00:00
security Makefile: Make vboot_fw.a a .PHONY target 2023-12-08 17:44:38 +00:00
soc vc/amd/opensil: add _POC suffix to SOC_AMD_OPENSIL_GENOA 2023-12-16 20:14:47 +00:00
southbridge sb/intel/bd82x6x: assign EHCI controller ops in chipset devicetree 2023-12-06 16:20:24 +00:00
superio superio/smsc: Add support for the SCH555x series 2023-12-01 17:40:11 +00:00
vendorcode vc/amd/opensil: add _POC suffix to SOC_AMD_OPENSIL_GENOA 2023-12-16 20:14:47 +00:00
Kconfig Allow to build romstage sources inside the bootblock 2023-11-09 13:20:18 +00:00