coreboot/src/soc/intel/common
Duncan Laurie 63ebc80e98 intel/common: Add common code for filling out ACPI _SWS
Add common code for filling out the NVS fields that are used by
the ACPI _SWS methods.  The SOC must provide a function to fill
out the wake source data since the specific data inputs vary by
platform.

BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-glados coreboot

Change-Id: I4f3511adcc89a9be5d97a7442055c227a38c5f42
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: cee5fa176c16ca44712bce8f3c8045daa5f07339
Original-Change-Id: I16f446ef67777acb57223a84d38062be9f43fcb9
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/298167
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11646
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-09-17 14:13:37 +00:00
..
acpi intel/common: Add common code for filling out ACPI _SWS 2015-09-17 14:13:37 +00:00
acpi.h intel/common: Add common code for filling out ACPI _SWS 2015-09-17 14:13:37 +00:00
acpi_wake_source.c intel/common: Add common code for filling out ACPI _SWS 2015-09-17 14:13:37 +00:00
fsp_ramstage.c fsp1_1: provide binding to UEFI version 2015-09-10 17:52:28 +00:00
gma.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
hda_verb.c Intel Common SOC: Add romstage support 2015-06-24 17:05:06 +02:00
hda_verb.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
Kconfig intel/common: Add common code for filling out ACPI _SWS 2015-09-17 14:13:37 +00:00
Makefile.inc intel/common: Add common code for filling out ACPI _SWS 2015-09-17 14:13:37 +00:00
memmap.h intel/common: fix stage_cache_external_region() 2015-08-14 15:19:31 +02:00
mrc_cache.c bootstate: remove need for #ifdef ENV_RAMSTAGE 2015-09-04 21:01:58 +00:00
mrc_cache.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
nvm.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
nvm.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
raminit.c fsp1_1: provide binding to UEFI version 2015-09-10 17:52:28 +00:00
ramstage.h fsp1_1: provide binding to UEFI version 2015-09-10 17:52:28 +00:00
reset.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
romstage.c intel/common: Print board ID if enabled 2015-09-10 09:52:25 +00:00
romstage.h fsp1_1: provide binding to UEFI version 2015-09-10 17:52:28 +00:00
stack.c Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
stack.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
stage_cache.c intel/common: fix stage_cache_external_region() 2015-08-14 15:19:31 +02:00
util.c Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
util.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
vbt.c fsp1_1: provide binding to UEFI version 2015-09-10 17:52:28 +00:00