coreboot/src/soc/intel
Wenkai Du aec2442f3c broadwell: add RCBA posting read after writing
MEI PCI device has internal logic to flush out the posted writes
before returning completion for non-posted request. When doing a RCBA
write to function disable and then using the PCI CFG RD cycle, need
to do RCBA posting read after writing to it to make sure the write
went through.

As Aaron sugegsted, abstracted function disable path to a common
function.

BUG=chrome-os-partner:33048
TEST=run warm and cold reboot testing

Change-Id: I40d374f1712a9137b3b1eac6bbf2d71078840406
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: f10b368e01
Original-Change-Id: I87aa8ccd604446263fc3621c9a01839a5a75b644
Original-Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/223715
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/9462
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-10 19:29:33 +02:00
..
baytrail baytrail: Switch from ACPI mode to PCI mode for legacy support 2015-04-10 19:21:49 +02:00
broadwell broadwell: add RCBA posting read after writing 2015-04-10 19:29:33 +02:00
common baytrail: Fix hdmi audio choppy issue 2015-04-06 19:06:37 +02:00
fsp_baytrail build system: rename __BOOT_BLOCK__ and __VER_STAGE__ 2015-04-04 20:07:18 +02:00
Makefile.inc broadwell: Hook into the build system 2014-12-31 21:23:09 +01:00