aea59401d0
Since the MCA(X) registers have defined values on the cold boot path, the is_warm_reset check can be dropped. Also the warm reset bit in the NCP_ERR register doesn't behave as the PPR [1] suggested; no matter if something was written to the register or the machine went through a warm reset cycle, the NCP_WARM_BOOT bit never got set. [1] checked with PPR for AMD Family 17h Models 11h,18h B1 (RV,PCO) #55570 Rev 3.15 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I4e6df98ffd5d15ca204c9847a76c19c753726737 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> |
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| .. | ||
| acpi | ||
| arch | ||
| commonlib | ||
| console | ||
| cpu | ||
| device | ||
| drivers | ||
| ec | ||
| include | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| security | ||
| soc | ||
| southbridge | ||
| superio | ||
| vendorcode | ||
| Kconfig | ||