Kyösti Mälkki ae7ac8a723 ACPI: Separate ChromeOS NVS in ASL ... For builds with MAINBOARD_HAS_CHROMEOS=y but CHROMEOS=n, there is reduced dsdt.aml size and reduced GNVS allocation from cbmem. More importantly, it's less error-prone when the OperationRegion size is not hard-coded inside the .asl files. Change-Id: I54b0d63a41561f9a5d9ebde77967e6d21ee014cd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49477 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-01-28 08:59:11 +00:00
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amd	soc/amd/picasso: Add UPDs for support eDP power sequence adjust	2021-01-25 09:10:51 +00:00
cavium	{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent	2020-09-01 03:06:04 +00:00
eltan	vc/eltan/security/verified_boot/vboot_check.c: Add check PROG_POSTCAR	2021-01-15 11:18:58 +00:00
google	ACPI: Separate ChromeOS NVS in ASL	2021-01-28 08:59:11 +00:00
intel	{soc,vc,mb}/intel: Drop support for Cannon Lake SoC	2021-01-11 17:23:53 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	vendorcode/eltan: Add vendor code for measured and verified boot	2019-06-04 10:41:53 +00:00