coreboot/src/include/cpu/x86
Lee Leahy ae738acdc5 cpu/x86: Support CPUs without rdmsr/wrmsr instructions
Quark does not support the rdmsr and wrmsr instructions.  In this case
use a SOC specific routine to support the setting of the MTRRs.  Migrate
the code from FSP 1.1 to be x86 CPU common.

Since all rdmsr/wrmsr accesses are being converted, fix the build
failure for quark in lib/reg_script.c.  Move the soc_msr_x routines and
their depencies from romstage/mtrr.c to reg_access.c.

TEST=Build and run on Galileo Gen2

Change-Id: Ibc68e696d8066fbe2322f446d8c983d3f86052ea
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15839
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-07-27 13:50:11 +02:00
..
bist.h header files: Fix guard name comments to match guard names 2016-01-18 04:07:53 +01:00
cache.h tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
cr.h tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
gdt.h tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
lapic.h Replace hlt() loops with halt() 2014-11-30 12:20:07 +01:00
lapic_def.h AMD Steppe Eagle: CPU files for new SoC 2014-08-30 19:15:18 +02:00
mp.h cpu/x86/mp_init: reduce exposure of internal implementation 2016-05-06 16:47:54 +02:00
msr.h cpu/x86: Support CPUs without rdmsr/wrmsr instructions 2016-07-27 13:50:11 +02:00
mtrr.h cpu/x86: Support CPUs without rdmsr/wrmsr instructions 2016-07-27 13:50:11 +02:00
name.h tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
pae.h Since some people disapprove of white space cleanups mixed in regular commits 2010-04-27 06:56:47 +00:00
post_code.h Make POST device configurable. 2014-03-16 21:42:49 +01:00
smm.h cpu/x86/smm_module_loader: always build with SMM module support 2016-05-04 15:54:15 +02:00
tsc.h timestamp: add tick frequency to exported table 2015-08-31 13:55:28 +00:00