coreboot/src
Duncan Laurie ae1ef60dfa falco: Update DIMM SPD table
RAM_ID indices have been changed and settled on a 2GB config
that will be the same DRAM chips but only used in one channel.

Change-Id: I444e655883ae045622ab3dfb964da4d7f86e1c0d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56810
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4198
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25 23:48:30 +01:00
..
arch x86: fix compile error for !CONFIG_MULTIBOOT 2013-11-25 23:40:46 +01:00
console console: Add hexdump32 function 2013-11-10 14:12:31 +01:00
cpu Support for nehalem northbridge 2013-11-25 20:23:38 +01:00
device x86: use proper types for interrupt callbacks 2013-11-25 23:05:09 +01:00
drivers RTC: Skip rtc_init() in S3 resume path 2013-11-25 23:41:23 +01:00
ec Add declaration of dock registers 1, 2 and 3. 2013-11-25 07:00:11 +01:00
include smbios: Add generic type41 write function 2013-11-25 23:38:21 +01:00
lib lib/coreboot_table: set type and size of framebuffer tag after fill_lb_framebuffer 2013-11-23 18:40:40 +01:00
mainboard falco: Update DIMM SPD table 2013-11-25 23:48:30 +01:00
northbridge haswell: Add magic to turn on grahpics in normal mode 2013-11-25 23:47:54 +01:00
southbridge lynxpoint: Add ACPI Method to enable GPIO as wake source 2013-11-25 23:45:23 +01:00
superio sio1007: Properly build '.c' files 2013-11-10 14:19:28 +01:00
vendorcode slippy: Minor vboot related fixes 2013-11-25 23:27:53 +01:00
Kconfig Add GRUB2 payload to build system 2013-11-19 01:07:25 +01:00