Arthur Heymans bab9e2e6bd arch/x86: Add a common romstage entry ... It might be possible to have this used for more than x86, but that will be for a later commit. Change-Id: I4968364a95b5c69c21d3915d302d23e6f1ca182f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>		2022-06-07 12:54:39 +00:00
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amd	arch/x86: Add a common romstage entry	2022-06-07 12:54:39 +00:00
cavium	Replace some ENV_ROMSTAGE with ENV_RAMINIT	2022-06-07 12:53:19 +00:00
example	arch/x86: Add a common romstage entry	2022-06-07 12:54:39 +00:00
intel	soc/intel/cmn/mp_init: Create helper function to load microcode	2022-06-07 12:51:23 +00:00
mediatek	Replace some ENV_ROMSTAGE with ENV_RAMINIT	2022-06-07 12:53:19 +00:00
nvidia	soc/*: Use __fallthrough statement	2022-05-11 06:04:25 +00:00
qualcomm	sc7180: Trogdor to support 2 dcb	2022-06-01 18:05:38 +00:00
rockchip	soc/*: Use __fallthrough statement	2022-05-11 06:04:25 +00:00
samsung	i2c: Add configurable I2C transfer timeout	2022-03-15 22:06:27 +00:00
sifive	Replace some ENV_ROMSTAGE with ENV_RAMINIT	2022-06-07 12:53:19 +00:00
ti	treewide: Remove "ERROR: "/"WARN: " prefixes from log messages	2022-02-07 23:29:09 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00