ae1dc9a24d
While the real-time clock updates its count, values may not be correctly read or written. On reads, ensure the UIP bit is clear which guarantees a minimum of 244 microseconds exists before the update begins. Writes already avoid the problem by disabling the RTC count via the SET bit. BUG=None BRANCH=None TEST=None Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/17369 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Change-Id: I39e34493113015d32582f1c280fafa9e97f43a40 Reviewed-on: https://chromium-review.googlesource.com/412852 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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| .. | ||
| i8254.h | ||
| i8259.h | ||
| isa-dma.h | ||
| keyboard.h | ||
| mc146818rtc.h | ||
| vga.h | ||
| vga_io.h | ||