Furquan Shaikh ad8cf6209f mb/google/zork: Switch to normal read mode for EM100 ... This change sets the EFS config for SPI read mode to normal read mode when using em100. With this, the boot is stable again without any random hangs in PSP. BUG=b:164429022 Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I4cd3673dcc44a61905719a57f734df2fb9f4e6e2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44464 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt Papageorge <matthewpapa07@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2020-08-17 07:09:53 +00:00
..
acpi	src/acpi: Add missing <{stdbool,stdint}.h>	2020-07-29 09:37:10 +00:00
arch	arch/x86/exit_car.S: Make sure _cbmem_top_ptr hits dram	2020-08-17 06:22:41 +00:00
commonlib
console
cpu	cpu/Makefile.inc: Clean up non-existing directory inclusion	2020-08-17 06:24:23 +00:00
device	{sb/intel/*/azalia.c,device/azalia_device.c}: Reduce differences	2020-08-17 06:58:45 +00:00
drivers	src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers	2020-08-17 07:00:37 +00:00
ec	ec/google/chromeec: Add helper to request AP reset	2020-08-14 08:35:15 +00:00
include	soc/intel/common: Move common HDA registers to <device/azalia_device.h>	2020-08-17 06:44:04 +00:00
lib	lib/imd_cbmem.c: Add a helper function to indicate that cbmem is ready	2020-08-17 06:22:58 +00:00
mainboard	mb/google/zork: Switch to normal read mode for EM100	2020-08-17 07:09:53 +00:00
northbridge	src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers	2020-08-17 07:00:37 +00:00
security	security/vboot/Makefile.inc: Update regions-for-file function	2020-08-13 05:43:53 +00:00
soc	{soc/intel/common,sb/intel/lynxpoint}/hda_verb.c: Reduce differences	2020-08-17 06:59:24 +00:00
southbridge	src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers	2020-08-17 07:00:37 +00:00
superio	superio/ite/it8728f: Correct Kconfig selections	2020-08-14 00:51:37 +00:00
vendorcode	vc/amd/fsp/picasso: add FSP-M UPD to disable the SATA controller	2020-08-17 06:21:43 +00:00
Kconfig