coreboot/src/vendorcode/amd
Paul Menzel ac63b415ed vendorcode/amd/agesa: Fix variable length array declaration
Definition of S_PSTATE only allowed PStateStruct[0], while it is
effectively used as a flexible array. Since sizeof(S_PSTATE) is
reduced here by sizeof(S_PSTATE_VALUES), we have to account for
that when calculating PStateLevelingSizeOfBytes.

In S_PSTATE context, PStateStruct[PStateMaxValue] is valid reference.

GCC 7.2.0 warns about an out of bounds array subscript.

```
    CC         libagesa/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateLeveling.o
src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateLeveling.c: In function 'PStateLevelingMain':
src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateLeveling.c:524:65: error: array subscript is above array bounds [-Werror=array-bounds]
             PStateBufferPtrTmp->PStateCoreStruct[0].PStateStruct[k].PStateEnable = 0;
             ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~

[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html

Change-Id: If9598a951c6b882432689b677a956c44650c7083
Found-by: gcc (Debian 7.2.0-2) 7.2.0
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21297
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-03 15:17:41 +00:00
..
agesa vendorcode/amd/agesa: Fix variable length array declaration 2018-05-03 15:17:41 +00:00
cimx AGESA f15 cimx/sb700: Remove vendorcode source 2018-01-24 02:11:04 +00:00
include AGESA cimx: Move cb_types.h to vendorcode 2017-09-26 09:25:47 +00:00
pi vendorcode/amd/pi/00670F00: Remove include header 2018-04-25 14:09:48 +00:00
Kconfig Expose Kconfig boolean for AGESA or binaryPI 2017-07-29 08:00:25 +00:00
Makefile.inc AMD Steppe Eagle: Add binary PI vendorcode files 2014-08-30 19:13:45 +02:00