Subrata Banik ac1cd44525 soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP-PCH ... This patch ensures soc/sata.c correctly translates pci config offset 0x92 Bit 0-2 [SATA Port x Present (SPDx)] 0 = Port x is enabled. 1 = Port x is disabled. Change-Id: Ide093dafe33b947ba7845cc0b74a975471353e39 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/23591 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2018-02-07 08:09:24 +00:00
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amd	soc/amd/stoneyridge/acpi/sleepstates.asl: Fix guarded code	2018-02-06 15:25:26 +00:00
broadcom	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
dmp	DMP Vortex86ex board & chip: Remove - using LATE_CBMEM_INIT	2018-01-15 23:23:17 +00:00
imgtec	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
intel	soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP-PCH	2018-02-07 08:09:24 +00:00
lowrisc	RISC-V boards: Stop using the config string	2017-11-07 12:31:00 +00:00
marvell	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
mediatek	soc/mediatek/mt8173: Remove cast of NULL* to void *	2017-11-03 16:03:30 +00:00
nvidia	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
qualcomm	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
rockchip	rockchip/rk3399: Pass coreboot table pointer to ARM TF	2018-02-02 22:19:26 +00:00
samsung	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
ucb	riscv: Remove config string support	2017-12-02 05:25:00 +00:00